1. Field of the Invention
The present invention is related to the field of computer systems. More particularly, the present invention is a method and direct memory access controller for asynchronously reading/writing data from/to a memory with improved throughput.
2. Art Background
Traditionally, data transfers between memory and an input-output (I/O) device of a computer system are accomplished in one of three ways:
1. Programmed I/O. In this case, all data transfers between the memory and the I/O device is completely controlled by the central processing unit (CPU), or more precisely, by a program executed by the CPU.
2. Interrupt I/O. In this case, all data transfers between the memory and the I/O device are initiated by the I/O devices through interrupts. In response, the CPU suspends whatever it is currently doing and attends to the needs of the I/O device.
3. Direct Memory Access (DMA). In this case, all data transfers between the memory and the I/O device are accomplished without involving the CPU.
The DMA approach provides a much faster way of moving data between the memory and the I/O device. Typically, a direct memory access controller is employed. The DMA controller, the CPU, the memory and the I/O device are all coupled to a system bus. Upon request of the I/O device, the DMA controller suppresses the CPU, takes control of the system bus and causes data to be transferred between the memory and the I/O device. The DMA controller is not involved in the actual transfer of the data. By duplicating the internal logic of the DMA controller, a DMA controller may support multiple I/O devices.
Alternatively, the I/O device may be coupled to the DMA controller instead of the system bus. In that case, after taking control of the system bus, the DMA controller causes data to be transferred from the memory (I/O device) to itself and then re-transmits the data to the I/O device (memory). By involving the DMA controller in the actual data transfer, the DMA controller gains the ability to interpret or process the data being transferred. However, the DMA controller pays for the added ability by sacrificing performance.
Typically, the data are transferred on a first-in first-out (FIFO) basis. The memory (I/O device) waits while the data are being re-transmitted from the DMA controller to the I/O device (memory). While some DMA controllers allow the next data transfer from the memory (I/O device) to parallel the re-transmission of the prior data to the I/O device (memory), the next data must be sequential to the prior data.
As will be discussed, the present invention overcomes the disadvantages of the prior art, and provides a method and a DMA controller for asynchronously reading/writing data from/to a memory with improved throughput. The method and the DMA controller achieve the improved throughput in a manner that is completely transparent to the system software.